The present invention relates to a high speed coding system. More particularly, the invention relates to a high speed coding system for converting analog signals to digital signals.
A known coding system for high speed coding is divided into two coding circuits connected to each other through an analog memory circuit which functions as a sample and hold circuit. The known coding system is said to have approximately twice the coding speed of a single coder. This is accomplished by the addition of the analog memory circuit and a few other circuits.
In the known coding system, the total number of bits to be coded is the sum of the numbers of bits of the divided respective coding circuits. However, in order to attain coding characteristics sufficient as a coder with the whole bits to be coded, it is necessary to provide divided respective coding circuits with a precision obtained from the whole bits. It is also necessary that the analog memory circuit have exacting, precise, stringent, or severe characteristics. The known coding system thus has a serious disadvantage and is therefore very difficult to produce and use.
The principal object of the invention is to provide a coding system which eliminates the disadvantage of the known coding system.
An object of the invention is to provide a coding system which functions at high speed with efficiency, effectiveness and reliability.
Another object of the invention is to provide a coding system which operates at high speed and with great precision and accuracy.